View ML610Q432-NNNTCZ03A_6967923.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

fedl610q431-01 issue date: jun.29, 2010 ml610q431/ml610q432 8-bit microcontroller with a built-in lcd driver 1/35 general description this lsi is a high-performance 8-bit cmos microcontroller into which rich peripheral circui ts, such as real-time clock, synchronous serial port, uart, i 2 c bus interface (master), melody driver, battery level detect circuit, rc oscillation type a/d converter, 12-bit successive approximation type a/d converter, and lcd driver, are incorporated around 8-bit cpu nx-u8/100. the cpu nx-u8/100 is capable of efficient instruction execution in 1-intruction 1-clock mode by 3-stage pipe line architecture parallel procesing. the flash rom that is installed as program memory achieves low-voltage low-power consumption operation (read operation) equivalent to mask rom and is most suitable for battery-driven applications. the on-chip debug function that is installed enables program debugging and programming. features ? cpu ? 8-bit risc cpu (cpu name: nx-u8/100) ? instruction system: 16-bit instructions ? instruction set: transfer, arithmetic operations, comp arison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on ? on-chip debug function ? minimum instruction execution time 30.5 s (@32.768 khz system clock) 0.24 4 s (@4.096 mhz system clock) ? internal memory ? internal 64kbbyte flash rom (32k 16 bits) (including unusable 1kbyte test area) ? internal 2kbyte data ram (2048 8 bits), 1kbyte display allocation ram (1024 x 8bit) ? internal 192byte ram for display ? interrupt controller ? 2 non-maskable interrupt sources (int ernal source: 1, external source: 1) ? 23 maskable interrupt sources (internal sources: 19, external sources: 4) ? time base counter ? low-speed time base counter 1 channel frequency compensation (compensation range: approx. ? 488ppm to +488ppm. compensation accuracy: approx. 0.48ppm) ? high-speed time base counter 1 channel ? watchdog timer ? non-maskable interrupt and reset ? free running ? overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s) ? timers ? 8 bits 4 channels (16-bit configuration available) ? 1 khz timer ? 10 hz/1 hz interrupt function
fedl610q431-01 oki semiconductor ml610q431/ml610q432 2/35 ? capture ? time base capture 2 channels (4096 hz to 32 hz) ? pwm ? resolution 16 bits 1 channel ? real time clock ? year, month, day, day of the week, hour, minute, and second registers ? automatic leap year correction ? regular interrupts (0.5 sec, 1 sec, 1 minute, 1 hour) ? alarm interrupt 2 channels (day of the week, hour, minute; month, day hour, minute) ? synchronous serial port ? master/slave selectable ? lsb first/msb first selectable ? 8-bit length/16-bit length selectable ? uart ? txd/rxd 1 channel ? bit length, parity/no parity, odd parity/even parity, 1 stop bit/2 stop bits ? positive logic/negative logic selectable ? built-in baud rate generator ? i 2 c bus interface ? master function only ? fast mode (400 kbps@4mh ), standard mode (100 kbps@1mh , 50kbps@500khz) ? melody driver ? scale: 29 types (melody sound frequency: 508 hz to 32.768 khz) ? tone length: 63 types ? tempo: 15 types ? buzzer output mode (4 output mode s, 8 frequencies, 16 duty levels) ? rc oscillation type a/d converter ? 24-bit counter ? time division 2 channels ? successive approximation type a/d converter ? 12-bit a/d converter ? input 2 channels ? general-purpose ports ? non-maskable interrupt input port 1 channel ? input-only port 6 channels (including secondary functions) ? output-only port 3 channels (including secondary functions) ? input/output port ml610q431: 22 channels (including secondary functions) ml610q432: 14 channels (including secondary functions)
fedl610q431-01 oki semiconductor ml610q431/ml610q432 3/35 ? lcd driver ? dot matrix can be supported. ml610q431: 1024 dots max. (64 seg 16 com) ml610q432: 1536 dots max. (64 seg 24 com) ? 1/1 to 1/24 duty ? 1/3 or 1/4 bias (built-in bias generation circuit) ? frame frequency selecable (approx. 64 hz, 73 hz, 85 hz, and 102 hz) ? bias voltage multiplying clock selectable (8 types) ? contrast adjustment (1/3 bias: 32 steps, 1/4 bias: 20 steps) ? lcd drive stop mode, lcd display mode, all lcds on mode, and all lcds off mode selectable ? programmable display allocation function (available only when 1/1~1/8 duty is selected) ? reset ? reset through the reset_n pin ? power-on reset generation when powered on ? reset when oscillation stop of the low-speed clock is detected ? reset by the watchdog timer (wdt) overflow ? power supply voltage detect function ? judgment voltages: one of 16 levels ? judgment accuracy: 2% (typ.) ? clock ? low-speed clock: (this lsi can not guarantee the operation withoug low-speed clock) crystal oscillation (32.768 khz) ? high-speed clock: built-in rc oscillation (500 khz) built-in pll oscillation (8.192 mhz 2.5%), crystal/ceramic oscillation (4.096 mhz), external clock ? selection of high-speed clock mode by software: built-in rc oscillation, built-in pll oscillation, crystal/ceramic oscillation, external clock ? power management ? halt mode: instruction execution by cpu is suspende d (peripheral circuits are in operating states). ? stop mode: stop of low-speed oscillation and high-speed os cillation (operations of cpu and peripheral circuits are stopped.) ? clock gear: the frequency of high-speed sy stem clock can be changed by software (1/1, 1/2, 1/4, or 1/8 of the oscillation clock) ? block control function: power down (reset registers and stop clock supply) the circuits of unused peripherals. ? shipment ? chip ml610q431-xxxwa (blank product: ml610q431-nnnwa) ml610q432-xxxwa (blank product: ml610q432-nnnwa) ? 144-pin plastic lqfp ml610q431-xxxtcz03a (blank product: ml610q431-nnntcz03a) ml610q432-xxxtcz03a (blank product: ML610Q432-NNNTCZ03A) xxx: rom code number ? guaranteed operating range ? operating temperature: ? 20 c to 70 c ? operating voltage: v dd = 1.1v to 3.6v, av dd = 2.2v to 3.6v
fedl610q431-01 oki semiconductor ml610q431/ml610q432 4/35 block diagram ml610q431 block diagram figure 1 show the block diagram of the ml610q431. "*" indicates the secondary function of each port. figure 1 ml610q431 block diagram program memory (flash) 64kbyte ssio sck0* sin0* sout0* uart rxd0* txd0* i 2 c sda* scl* int 1 ram 2048byte interrupt controller cpu (nx-u8/100) timing controller ea sp on-chip ice instruction decoder bus controller instruction register tbc int 4 int 1 int 1 int 1 wdt int 4 8bit timer 4 capture 2 int 1 pwm gpio p00 to p03 p10 to p11 p20 to p22 int 5 nmi p30 to p35 p40 to p47 pa0 to pa7 rtc int 3 data-bus pwm0* melody int 1 md0* test reset_n osc xt0 xt1 osc0* osc1* lsclk* outclk* bld power av dd av ss v ddl lcd driver com0 to com15 seg0 to seg63 lcd bias v l1 , v l2 , v l3 , v l4 c1 , c2 , c3 , c4 12bit-adc ain0 , ain1 v ref rc-adc 2 cs0* in0* rs0* rt0* crt0* rcm* cs1* in1* rs1* rt1* reset & test alu epsw1 3 psw elr1 3 lr ecsr1 3 dsr/csr pc greg 0 15 v pp v dd v ss v ddx 1khztc int 1 int 1 int 1 display ram 192byte display allocation ram 1024byte
fedl610q431-01 oki semiconductor ml610q431/ml610q432 5/35 ml610q432 block diagram figure 2 show the block diagram of the ml610q432. "*" indicates the secondary function of each port. figure 2 ml610q432 block diagram program memory (flash) 64kbyte ssio sck0* sin0* sout0* uart rxd0* txd0* i 2 c sda* scl* int 1 ram 2048byte interrupt controller cpu (nx-u8/100) timing controller ea sp on-chip ice instruction decoder bus controller instruction register tbc int 4 int 1 int 1 int 1 wdt int 4 8bit timer 4 capture 2 int 1 pwm gpio p00 to p03 p10 to p11 p20 to p22 int 5 nmi p30 to p35 p40 to p47 rtc int 3 data-bus pwm0* melody int 1 md0* test reset_n osc xt0 xt1 osc0* osc1* lsclk* outclk* bld power av dd av ss v ddl lcd driver com0 to com23 seg0 to seg63 lcd bias v l1 , v l2 , v l3 , v l4 c1 , c2 , c3 , c4 12bit-adc ain0 , ain1 v ref rc-adc 2 cs0* in0* rs0* rt0* crt0* rcm* cs1* in1* rs1* rt1* reset & test alu epsw1 3 psw elr1 3 lr ecsr1 3 dsr/csr pc greg 0 15 v pp v dd v ss v ddx 1khztc int 1 int 1 int 1 display ram 192byte display allocation ram 1024byte
fedl610q431-01 oki semiconductor ml610q431/ml610q432 6/35 pin configuration ml610q431 lqfp144 pin layout (nc): no connection figure 3 ml610q431 lqfp144 pin configuration seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 ( nc ) seg16 ( nc ) seg15 seg46 ( nc ) ( nc ) seg45 seg44 seg43 c4 c3 c2 c1 v l4 v l3 v l2 v l1 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 com12 com13 com14 com15 pa7 pa6 pa5 pa4 pa3 pa2 pa1 pa0 test seg47 v dd v pp seg48 seg49 seg50 seg51 seg52 seg53 seg54 seg55 seg56 seg57 seg58 seg59 seg60 seg61 seg62 seg63 com0 com1 com2 com3 com4 com5 com6 com7 com8 com9 com10 com11 av dd v ref av ss ain0 ain1 p00 nmi v ss p20 p21 p22 p40 p41 p42 p43 p44 p45 p46 p47 p30 p31 p32 p33 p34 p35 v ddx xt0 xt1 v ss v ddl v dd p10 ( nc ) ( nc ) p03 ( nc ) p02 ( nc ) p01 p11 reset_n 1pin 144pin 72pin 73pin 36pin 37pin 108pin 109pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 99 98 97 96 95 94 93 92 91 90 108 107 106 105 104 103 102 101 100 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 3 144 14 l610q431
fedl610q431-01 oki semiconductor ml610q431/ml610q432 7/35 ml610q432 lqfp144 pin layout (nc): no connection figure 4 ml610q432 lqfp144 pin configuration seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 ( nc ) seg16 ( nc ) seg15 seg46 ( nc ) ( nc ) seg45 seg44 seg43 c4 c3 c2 c1 v l4 v l3 v l2 v l1 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg0 com12 com13 com14 com15 com16 com17 com18 com19 com20 com21 com22 com23 test seg47 v dd v pp seg48 seg49 seg50 seg51 seg52 seg53 seg54 seg55 seg56 seg57 seg58 seg59 seg60 seg61 seg62 seg63 com0 com1 com2 com3 com4 com5 com6 com7 com8 com9 com10 com11 av dd v ref av ss ain0 ain1 p00 nmi v ss p20 p21 p22 p40 p41 p42 p43 p44 p45 p46 p47 p30 p31 p32 p33 p34 p35 v ddx xt0 xt1 v ss v ddl v dd p10 ( nc ) ( nc ) p03 ( nc ) p02 ( nc ) p01 p11 reset_n 1pin 144pin 72pin 73pin 36pin 37pin 108pin 109pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 99 98 97 96 95 94 93 92 91 90 108 107 106 105 104 103 102 101 100 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 l610q432
fedl610q431-01 oki semiconductor ml610q431/ml610q432 8/35 ml610q431 chip pin layout & dimension seg45 seg44 seg43 seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 seg46 98 68 seg16 seg47 99 67 seg15 vdd 100 66 c4 vpp 101 65 c3 seg48 102 64 c2 seg49 103 63 c1 seg50 104 62 vl4 seg51 105 61 vl3 seg52 106 60 vl2 seg53 107 59 vl1 seg54 108 58 seg14 seg55 109 57 seg13 seg56 110 56 seg12 seg57 111 55 seg11 seg58 112 54 seg10 seg59 113 53 seg9 seg60 114 52 seg8 seg61 115 51 seg7 seg62 116 50 seg6 seg63 117 49 seg5 com0 118 48 seg4 com1 119 47 seg3 com2 120 46 seg2 com3 121 45 seg1 com4 122 44 seg0 com5 123 43 com12 com6 124 42 com13 com7 125 41 com14 com8 126 40 com15 com9 127 39 pa7 com10 128 38 pa6 com11 129 37 pa5 avdd 130 36 pa4 vref 131 35 pa3 avss 132 34 pa2 ain0 133 33 pa1 ain1 134 32 pa0 p03 135 31 test p02 136 30 p11/osc1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 p01 p00 nmi vss p20 p21 p22 p40 p41 reset_n p42 p43 p44 p45 p46 p47 p30 p31 p32 p33 p34 p35 vddx xt0 xt1 vss vddl vdd p10/osc 0 3.33mm 4.23mm chip size: 3.33 mm 4.23 mm pad count: 136 pins minimum pad pitch: 100 m pad aperture: 80 m 80 m chip thickness: 350 m voltage of the rear side of chip: v ss level figure 5 ml610q431 chip layout & dimension
fedl610q431-01 oki semiconductor ml610q431/ml610q432 9/35 ml610q432 chip pin layout & dimension seg45 seg44 seg43 seg42 seg41 seg40 seg39 seg38 seg37 seg36 seg35 seg34 seg33 seg32 seg31 seg30 seg29 seg28 seg27 seg26 seg25 seg24 seg23 seg22 seg21 seg20 seg19 seg18 seg17 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 seg46 98 68 seg16 seg47 99 67 seg15 vdd 100 66 c4 vpp 101 65 c3 seg48 102 64 c2 seg49 103 63 c1 seg50 104 62 vl4 seg51 105 61 vl3 seg52 106 60 vl2 seg53 107 59 vl1 seg54 108 58 seg14 seg55 109 57 seg13 seg56 110 56 seg12 seg57 111 55 seg11 seg58 112 54 seg10 seg59 113 53 seg9 seg60 114 52 seg8 seg61 115 51 seg7 seg62 116 50 seg6 seg63 117 49 seg5 com0 118 48 seg4 com1 119 47 seg3 com2 120 46 seg2 com3 121 45 seg1 com4 122 44 seg0 com5 123 43 com12 com6 124 42 com13 com7 125 41 com14 com8 126 40 com15 com9 127 39 com16 com10 128 38 com17 com11 129 37 com18 avdd 130 36 com19 vref 131 35 com20 avss 132 34 com21 ain0 133 33 com22 ain1 134 32 com23 p03 135 31 test p02 136 30 p11/osc1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 p01 p00 nmi vss p20 p21 p22 p40 p41 reset_n p42 p43 p44 p45 p46 p47 p30 p31 p32 p33 p34 p35 vddx xt0 xt1 vss vddl vdd p10/osc 0 3.33mm 4.23mm chip size: 3.33 mm 4.23 mm pad count: 136 pins minimum pad pitch: 100 m pad aperture: 80 m 80 m chip thickness: 350 m voltage of the rear side of chip: v ss level figure 6 ml610q432 chip layout & dimension
fedl610q431-01 oki semiconductor ml610q431/ml610q432 10/35 ml610q431 pad coordinates table 1 ml610q431 pad coordinates chip center: x=0,y=0 pad no. pad name x ( m) y ( m) pad no. pad name x ( m) y ( m) pad no. pad name x ( m) y ( m) 1 p01 -1400 -1978 51 seg7 1528 200 101 v pp -1528 1600 2 p00 -1300 -1978 52 seg8 1528 300 102 seg48 -1528 1500 3 nmi -1200 -1978 53 seg9 1528 400 103 seg49 -1528 1400 4 v ss -1100 -1978 54 seg10 1528 500 104 seg50 -1528 1300 5 p20 -1000 -1978 55 seg11 1528 600 105 seg51 -1528 1200 6 p21 -900 -1978 56 seg12 1528 700 106 seg52 -1528 1100 7 p22 -800 -1978 57 seg13 1528 800 107 seg53 -1528 1000 8 p40 -700 -1978 58 seg14 1528 900 108 seg54 -1528 900 9 p41 -600 -1978 59 v l1 1528 1000 109 seg55 -1528 800 10 reset_n -500 -1978 60 v l2 1528 1100 110 seg56 -1528 700 11 p42 -400 -1978 61 v l3 1528 1200 111 seg57 -1528 600 12 p43 -300 -1978 62 v l4 1528 1300 112 seg58 -1528 500 13 p44 -200 -1978 63 c1 1528 1400 113 seg59 -1528 400 14 p45 -100 -1978 64 c2 1528 1500 114 seg60 -1528 300 15 p46 0 -1978 65 c3 1528 1600 115 seg61 -1528 200 16 p47 100 -1978 66 c4 1528 1700 116 seg62 -1528 100 17 p30 200 -1978 67 seg15 1528 1800 117 seg63 -1528 0 18 p31 300 -1978 68 seg16 1528 1900 118 com0 -1528 -100 19 p32 400 -1978 69 seg17 1400 1978 119 com1 -1528 -200 20 p33 500 -1978 70 seg18 1300 1978 120 com2 -1528 -300 21 p34 600 -1978 71 seg19 1200 1978 121 com3 -1528 -400 22 p35 700 -1978 72 seg20 1100 1978 122 com4 -1528 -500 23 v ddx 800 -1978 73 seg21 1000 1978 123 com5 -1528 -600 24 xt0 900 -1978 74 seg22 900 1978 124 com6 -1528 -700 25 xt1 1000 -1978 75 seg23 800 1978 125 com7 -1528 -800 26 v ss 1100 -1978 76 seg24 700 1978 126 com8 -1528 -900 27 v ddl 1200 -1978 77 seg25 600 1978 127 com9 -1528 -1000 28 v dd 1300 -1978 78 seg26 500 1978 128 com10 -1528 -1100 29 p10 1400 -1978 79 seg27 400 1978 129 com11 -1528 -1200 30 p11 1528 -1900 80 seg28 300 1978 130 a vdd -1528 -1300 31 test 1528 -1800 81 seg29 200 1978 131 v ref -1528 -1400 32 pa0 1528 -1700 82 seg30 100 1978 132 a vss -1528 -1500 33 pa1 1528 -1600 83 seg31 0 1978 133 ain0 -1528 -1600 34 pa2 1528 -1500 84 seg32 -100 1978 134 ain1 -1528 -1700 35 pa3 1528 -1400 85 seg33 -200 1978 135 p03 -1528 -1800 36 pa4 1528 -1300 86 seg34 -300 1978 136 p02 -1528 -1900 37 pa5 1528 -1200 87 seg35 -400 1978 38 pa6 1528 -1100 88 seg36 -500 1978 39 pa7 1528 -1000 89 seg37 -600 1978 40 com15 1528 -900 90 seg38 -700 1978 41 com14 1528 -800 91 seg39 -800 1978 42 com13 1528 -700 92 seg40 -900 1978 43 com12 1528 -600 93 seg41 -1000 1978 44 seg0 1528 -500 94 seg42 -1100 1978 45 seg1 1528 -400 95 seg43 -1200 1978 46 seg2 1528 -300 96 seg44 -1300 1978 47 seg3 1528 -200 97 seg45 -1400 1978 48 seg4 1528 -100 98 seg46 -1528 1900 49 seg5 1528 0 99 seg47 -1528 1800 50 seg6 1528 100 100 v dd -1528 1700
fedl610q431-01 oki semiconductor ml610q431/ml610q432 11/35 ml610q432 pad coordinates table 2 ml610q432 pad coordinates chip center: x=0,y=0 pad no. pad name x ( m) y ( m) pad no. pad name x ( m) y ( m) pad no. pad name x ( m) y ( m) 1 p01 -1400 -1978 51 seg7 1528 200 101 v pp -1528 1600 2 p00 -1300 -1978 52 seg8 1528 300 102 seg48 -1528 1500 3 nmi -1200 -1978 53 seg9 1528 400 103 seg49 -1528 1400 4 v ss -1100 -1978 54 seg10 1528 500 104 seg50 -1528 1300 5 p20 -1000 -1978 55 seg11 1528 600 105 seg51 -1528 1200 6 p21 -900 -1978 56 seg12 1528 700 106 seg52 -1528 1100 7 p22 -800 -1978 57 seg13 1528 800 107 seg53 -1528 1000 8 p40 -700 -1978 58 seg14 1528 900 108 seg54 -1528 900 9 p41 -600 -1978 59 v l1 1528 1000 109 seg55 -1528 800 10 reset_n -500 -1978 60 v l2 1528 1100 110 seg56 -1528 700 11 p42 -400 -1978 61 v l3 1528 1200 111 seg57 -1528 600 12 p43 -300 -1978 62 v l4 1528 1300 112 seg58 -1528 500 13 p44 -200 -1978 63 c1 1528 1400 113 seg59 -1528 400 14 p45 -100 -1978 64 c2 1528 1500 114 seg60 -1528 300 15 p46 0 -1978 65 c3 1528 1600 115 seg61 -1528 200 16 p47 100 -1978 66 c4 1528 1700 116 seg62 -1528 100 17 p30 200 -1978 67 seg15 1528 1800 117 seg63 -1528 0 18 p31 300 -1978 68 seg16 1528 1900 118 com0 -1528 -100 19 p32 400 -1978 69 seg17 1400 1978 119 com1 -1528 -200 20 p33 500 -1978 70 seg18 1300 1978 120 com2 -1528 -300 21 p34 600 -1978 71 seg19 1200 1978 121 com3 -1528 -400 22 p35 700 -1978 72 seg20 1100 1978 122 com4 -1528 -500 23 v ddx 800 -1978 73 seg21 1000 1978 123 com5 -1528 -600 24 xt0 900 -1978 74 seg22 900 1978 124 com6 -1528 -700 25 xt1 1000 -1978 75 seg23 800 1978 125 com7 -1528 -800 26 v ss 1100 -1978 76 seg24 700 1978 126 com8 -1528 -900 27 v ddl 1200 -1978 77 seg25 600 1978 127 com9 -1528 -1000 28 v dd 1300 -1978 78 seg26 500 1978 128 com10 -1528 -1100 29 p10 1400 -1978 79 seg27 400 1978 129 com11 -1528 -1200 30 p11 1528 -1900 80 seg28 300 1978 130 a vdd -1528 -1300 31 test 1528 -1800 81 seg29 200 1978 131 v ref -1528 -1400 32 com23 1528 -1700 82 seg30 100 1978 132 a vss -1528 -1500 33 com22 1528 -1600 83 seg31 0 1978 133 ain0 -1528 -1600 34 com21 1528 -1500 84 seg32 -100 1978 134 ain1 -1528 -1700 35 com20 1528 -1400 85 seg33 -200 1978 135 p03 -1528 -1800 36 com19 1528 -1300 86 seg34 -300 1978 136 p02 -1528 -1900 37 com18 1528 -1200 87 seg35 -400 1978 38 com17 1528 -1100 88 seg36 -500 1978 39 com16 1528 -1000 89 seg37 -600 1978 40 com15 1528 -900 90 seg38 -700 1978 41 com14 1528 -800 91 seg39 -800 1978 42 com13 1528 -700 92 seg40 -900 1978 43 com12 1528 -600 93 seg41 -1000 1978 44 seg0 1528 -500 94 seg42 -1100 1978 45 seg1 1528 -400 95 seg43 -1200 1978 46 seg2 1528 -300 96 seg44 -1300 1978 47 seg3 1528 -200 97 seg45 -1400 1978 48 seg4 1528 -100 98 seg46 -1528 1900 49 seg5 1528 0 99 seg47 -1528 1800 50 seg6 1528 100 100 v dd -1528 1700
fedl610q431-01 oki semiconductor ml610q431/ml610q432 12/35 pin list pad no. primary function secon dary function tertiary function q432 q431 pin name i/o function pin nam e i/o function pin name i/o function 4,26 4,26 vss ? negative power supply pin ? ? ? ? ? ? 28, 100 28, 100 v dd ? positive power supply pin ? ? ? ? ? ? 27 27 v ddl ? power supply pin for internal logic (internally generated) ? ? ? ? ? ? 23 23 v ddx ? power supply pin for low-speed oscillation (internally generated) ? ? ? ? ? ? 101 101 v pp ? power supply pin for flash rom ? ? ? ? ? ? 132 132 av ss ? negative power supply pin for successive approximation type adc ? ? ? ? ? ? 130 130 av dd ? positive power supply pin for successive approximation type adc ? ? ? ? ? ? 59 59 v l1 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 60 60 v l2 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 61 61 v l3 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 62 62 v l4 ? power supply pin for lcd bias (internally generated) ? ? ? ? ? ? 63 63 c1 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 64 64 c2 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 65 65 c3 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 66 66 c4 ? capacitor connection pin for lcd bias generation ? ? ? ? ? ? 31 31 test i/o input/output pin for testing ? ? ? ? ? ? 10 10 reset_ n i reset input pin ? ? ? ? ? ? 24 24 xt0 i low-speed clock oscillation pin ? ? ? ? ? ? 25 25 xt1 o low-speed clock oscillation pin ? ? ? ? ? ? 131 131 v ref ? reference power supply pin for successive approximation type adc ? ? ? ? ? ?
fedl610q431-01 oki semiconductor ml610q431/ml610q432 13/35 pad no. primary function secon dary function tertiary function q432 q431 pin name i/o function pin nam e i/o function pin name i/o function 133 133 ain0 i successive approximation type adc input ? ? ? ? ? ? 134 134 ain1 i successive approximation type adc input ? ? ? ? ? ? 3 3 nmi i non-maskable interrupt pin ? ? ? ? ? ? 2 2 p00/exi 0/cap0 i input port, external interrupt 0, capture 0 input ? ? ? ? ? ? 1 1 p01/exi 1/cap1 i input port, external interrupt 1, capture 1 input ? ? ? ? ? ? 136 136 p02/exi 2/rxd0 i input port, external interrupt 2, uart0 receive ? ? ? ? ? ? 135 135 p03/ exi3 i input port, external interrupt 3 ? ? ? ? ? ? 29 29 p10 i input port osc0 i high-speed oscillation ? ? ? 30 30 p11 i input port osc1 o high-speed oscillation ? ? ? 5 5 p20/ led0 o output port lsclk o low-speed clock output ? ? ? 6 6 p21/ led1 o output port outclk o high-speed clock output ? ? ? 7 7 p22/ led2 o output port md0 o melody output ? ? ? 17 17 p30 i/o input/output port in0 i rc type adc0 oscillation input pin ? ? ? 18 18 p31 i/o input/output port cs0 o rc type adc0 reference capacitor connection pin ? ? ? 19 19 p32 i/o input/output port rs0 o rc type adc0 reference resistor connection pin ? ? ? 20 20 p33 i/o input/output port rt0 o rc type adc0 resistor sensor connection pin ? ? ? 21 21 p34 i/o input/output port rct0 o rc type adc0 resistor/capacitor sensor connection pin pwm0 o pwm output 22 22 p35 i/o input/output port rcm o rc type adc oscillation monitor ? ? ? 8 8 p40 i/o input/output port sda i/o i 2 c data input/output sin0 i ssio data input 9 9 p41 i/o input/output port scl i/o i 2 c clock input/output sck0 i/o ssio synchronous clock 11 11 p42 i/o input/output port rxd0 i uart data input sout0 o ssio data output 12 12 p43 i/o input/output port txd0 o uart data output pwm0 o pwm output 13 13 p44/t02 p0ck i/o input/output port, timer 0/timer 2/pwm0 external clock input in1 i rc type adc1 oscillation input pin sin0 i ssio0 data input 14 14 p45/t13 p1ck i/o input/output port, timer 1/timer 3 external clock input cs1 o rc type adc1 reference capacitor connection pin sck0 i/o ssio0 synchronous clock 15 15 p46 i/o input/output port rs1 o rc type adc1 reference resistor connection pin sout0 o ssio0 data output 16 16 p47 i/o input/output port rt1 o rc type adc1 resistor sensor connection pin ? ? ? ? 32 pa0 i/o input/output port ? ? ? ? ? ? ? 33 pa1 i/o input/output port ? ? ? ? ? ? ? 34 pa2 i/o input/output port ? ? ? ? ? ? ? 35 pa3 i/o input/output port ? ? ? ? ? ? ? 36 pa4 i/o input/output port ? ? ? ? ? ? ? 37 pa5 i/o input/output port ? ? ? ? ? ?
fedl610q431-01 oki semiconductor ml610q431/ml610q432 14/35 pad no. primary function secon dary function tertiary function q432 q431 pin name i/o function pin nam e i/o function pin name i/o function ? 38 pa6 i/o input/output port ? ? ? ? ? ? ? 39 pa7 i/o input/output port ? ? ? ? ? ? 118 118 com0 o lcd common pin ? ? ? ? ? ? 119 119 com1 o lcd common pin ? ? ? ? ? ? 120 120 com2 o lcd common pin ? ? ? ? ? ? 121 121 com3 o lcd common pin ? ? ? ? ? ? 122 122 com4 o lcd common pin ? ? ? ? ? ? 123 123 com5 o lcd common pin ? ? ? ? ? ? 124 124 com6 o lcd common pin ? ? ? ? ? ? 125 125 com7 o lcd common pin ? ? ? ? ? ? 126 126 com8 o lcd common pin ? ? ? ? ? ? 127 127 com9 o lcd common pin ? ? ? ? ? ? 128 128 com10 o lcd common pin ? ? ? ? ? ? 129 129 com11 o lcd common pin ? ? ? ? ? ? 43 43 com12 o lcd common pin ? ? ? ? ? ? 42 42 com13 o lcd common pin ? ? ? ? ? ? 41 41 com14 o lcd common pin ? ? ? ? ? ? 40 40 com15 o lcd common pin ? ? ? ? ? ? 39 ? com16 o lcd common pin ? ? ? ? ? ? 38 ? com17 o lcd common pin ? ? ? ? ? ? 37 ? com18 o lcd common pin ? ? ? ? ? ? 36 ? com19 o lcd common pin ? ? ? ? ? ? 35 ? com20 o lcd common pin ? ? ? ? ? ? 34 ? com21 o lcd common pin ? ? ? ? ? ? 33 ? com22 o lcd common pin ? ? ? ? ? ? 32 ? com23 o lcd common pin ? ? ? ? ? ? 44 44 seg0 o lcd segment pin ? ? ? ? ? ? 45 45 seg1 o lcd segment pin ? ? ? ? ? ? 46 46 seg2 o lcd segment pin ? ? ? ? ? ? 47 47 seg3 o lcd segment pin ? ? ? ? ? ? 48 48 seg4 o lcd segment pin ? ? ? ? ? ? 49 49 seg5 o lcd segment pin ? ? ? ? ? ? 50 50 seg6 o lcd segment pin ? ? ? ? ? ? 51 51 seg7 o lcd segment pin ? ? ? ? ? ? 52 52 seg8 o lcd segment pin ? ? ? ? ? ? 53 53 seg9 o lcd segment pin ? ? ? ? ? ? 54 54 seg10 o lcd segment pin ? ? ? ? ? ? 55 55 seg11 o lcd segment pin ? ? ? ? ? ? 56 56 seg12 o lcd segment pin ? ? ? ? ? ? 57 57 seg13 o lcd segment pin ? ? ? ? ? ? 58 58 seg14 o lcd segment pin ? ? ? ? ? ? 67 67 seg15 o lcd segment pin ? ? ? ? ? ? 68 68 seg16 o lcd segment pin ? ? ? ? ? ? 69 69 seg17 o lcd segment pin ? ? ? ? ? ? 70 70 seg18 o lcd segment pin ? ? ? ? ? ? 71 71 seg19 o lcd segment pin ? ? ? ? ? ? 72 72 seg20 o lcd segment pin ? ? ? ? ? ? 73 73 seg21 o lcd segment pin ? ? ? ? ? ? 74 74 seg22 o lcd segment pin ? ? ? ? ? ? 75 75 seg23 o lcd segment pin ? ? ? ? ? ? 76 76 seg24 o lcd segment pin ? ? ? ? ? ? 77 77 seg25 o lcd segment pin ? ? ? ? ? ? 78 78 seg26 o lcd segment pin ? ? ? ? ? ?
fedl610q431-01 oki semiconductor ml610q431/ml610q432 15/35 pad no. primary function secon dary function tertiary function q432 q431 pin name i/o function pin nam e i/o function pin name i/o function 79 79 seg27 o lcd segment pin ? ? ? ? ? ? 80 80 seg28 o lcd segment pin ? ? ? ? ? ? 81 81 seg29 o lcd segment pin ? ? ? ? ? ? 82 82 seg30 o lcd segment pin ? ? ? ? ? ? 83 83 seg31 o lcd segment pin ? ? ? ? ? ? 84 84 seg32 o lcd segment pin ? ? ? ? ? ? 85 85 seg33 o lcd segment pin ? ? ? ? ? ? 86 86 seg34 o lcd segment pin ? ? ? ? ? ? 87 87 seg35 o lcd segment pin ? ? ? ? ? ? 88 88 seg36 o lcd segment pin ? ? ? ? ? ? 89 89 seg37 o lcd segment pin ? ? ? ? ? ? 90 90 seg38 o lcd segment pin ? ? ? ? ? ? 91 91 seg39 o lcd segment pin ? ? ? ? ? ? 92 92 seg40 o lcd segment pin ? ? ? ? ? ? 93 93 seg41 o lcd segment pin ? ? ? ? ? ? 94 94 seg42 o lcd segment pin ? ? ? ? ? ? 95 95 seg43 o lcd segment pin ? ? ? ? ? ? 96 96 seg44 o lcd segment pin ? ? ? ? ? ? 97 97 seg45 o lcd segment pin ? ? ? ? ? ? 98 98 seg46 o lcd segment pin ? ? ? ? ? ? 99 99 seg47 o lcd segment pin ? ? ? ? ? ? 102 102 seg48 o lcd segment pin ? ? ? ? ? ? 103 103 seg49 o lcd segment pin ? ? ? ? ? ? 104 104 seg50 o lcd segment pin ? ? ? ? ? ? 105 105 seg51 o lcd segment pin ? ? ? ? ? ? 106 106 seg52 o lcd segment pin ? ? ? ? ? ? 107 107 seg53 o lcd segment pin ? ? ? ? ? ? 108 108 seg54 o lcd segment pin ? ? ? ? ? ? 109 109 seg55 o lcd segment pin ? ? ? ? ? ? 110 110 seg56 o lcd segment pin ? ? ? ? ? ? 111 111 seg57 o lcd segment pin ? ? ? ? ? ? 112 112 seg58 o lcd segment pin ? ? ? ? ? ? 113 113 seg59 o lcd segment pin ? ? ? ? ? ? 114 114 seg60 o lcd segment pin ? ? ? ? ? ? 115 115 seg61 o lcd segment pin ? ? ? ? ? ? 116 116 seg62 o lcd segment pin ? ? ? ? ? ? 117 117 seg63 o lcd segment pin ? ? ? ? ? ?
fedl610q431-01 oki semiconductor ml610q431/ml610q432 16/35 pin description pin name i/o description primary/ secondary/ tertiary logic system reset_n i reset input pin. when this pin is set to a ?l? level, system reset mode is set and the internal section is initialized. when this pin is set to a ?h? level subsequently, program execution starts. a pull-up resistor is internally connected. ? negative xt0 i ? ? xt1 o crystal connection pin for low-speed clock. a 32.768 khz crystal oscillator (see meas uring circuit 1) is connected to this pin. capacitors cdl and cgl ar e connected across this pin and v ss as required. ? ? osc0 i secondary ? osc1 o crystal/ceramic connection pin for high-speed clock. a crystal or ceramic is connected to this pin (4.1 mhz max.). capacitors cdh and cgh (see measuring circuit 1) are connected across this pin and v ss . this pin is used as the secondary function of the p10 pin(osc0) and p11 pin(osc1). secondary ? lsclk o low-speed clock output pin. this pin is used as the secondary function of the p20 pin. secondary ? outclk o high-speed clock output pin. this pin is used as the secondary function of the p21 pin. secondary ? general-purpose input port p00-p03 i general-purpose input port. since these pins have secondary functi ons, the pins cannot be used as a port when the secondary functions are used. primary positive p10-p11 i general-purpose input port. since these pins have secondary functi ons, the pins cannot be used as a port when the secondary functions are used. primary positive general-purpose output port p20-p22 o general-purpose output port. since these pins have secondary functi ons, the pins cannot be used as a port when the secondary functions are used. primary positive general-purpose input/output port p30-p35 i/o general-purpose input/output port. since these pins have secondary functi ons, the pins cannot be used as a port when the secondary functions are used. primary positive p40-p47 i/o general-purpose input/output port. since these pins have secondary functi ons, the pins cannot be used as a port when the secondary functions are used. primary positive pa0-pa7 i/o general-purpose input/output port. these pins are for the ml610q431, but are not provided in the ml610q432. primary positive
fedl610q431-01 oki semiconductor ml610q431/ml610q432 17/35 pin name i/o description primary/ secondary/ tertiary logic uart txd0 o uart data output pin. this pin is us ed as the secondary function of the p43 pin. secondary positive rxd0 i uart data input pin. this pin is us ed as the secondary function of the p42 or the primary func tion of the p02 pin. primary/se condary positive i 2 c bus interface sda i/o i 2 c data input/output pin. this pin is us ed as the secondary function of the p40 pin. this pin has an nmos open drain output. when using this pin as a function of the i 2 c, externally connect a pull-up resistor. secondary positive scl o i 2 c clock output pin. this pin is used as the secondary function of the p41 pin. this pin has an nmos open drain output. when using this pin as a function of the i 2 c, externally connect a pull-up resistor. secondary positive synchronous serial (ssio) sck0 i/o synchronous serial clock input/output pi n. this pin is used as the tertiary function of the p41 or p45 pin. tertiary ? sin0 i synchronous serial data input pin. this pin is used as the tertiary function of the p40 or p44 pin. tertiary positive sout0 o synchronous serial data output pin. this pin is used as the tertiary function of the p42 or p46 pin. tertiary positive pwm pwm0 o pwm0 output pin. this pin is used as the tertiary function of the p43 or p34 pin. tertiary positive t02p0ck pwm0 external clock input pin. this pin is used as the primary function of the p44 pin. primary ? external interrupt nmi i external non-maskable interrupt input pin. an interrupt is generated on both edges. primary positive/ negative exi0-3 i external maskable interrupt input pins. interrupt enable and edge selection can be performed for each bit by software. these pins are used as the primary functions of the p00-p03 pins. primary positive/ negative capture cap0 i primary positive/ negative cap1 i capture trigger input pins. the value of the time base counter is captured in the register synchronously with the interrupt edge selected by software. these pins are used as the primary functions of the p00 pin(cap0) and p01 pin(cap1). primary positive/ negative timer t02p0ck i external clock input pin used for both timer 0 and timer 2. the clocks for these timers are selected by software. this pin is used as the primary function of the p44 pin. primary ? t13p1ck i external clock input pin used for both timer 1 and timer 3. the clocks for these timers are selected by software. this pin is used as the primary function of the p45 pin. primary ? melody md0 o melody/buzzer signal output pin. this pin is used as the secondary function of the p22 pin. secondary positive/ negative led drive led0-2 o nmos open drain output pins to driv e led. these pins are used as the primary function of the p20-p22 pins. primary positive/ negative
fedl610q431-01 oki semiconductor ml610q431/ml610q432 18/35 pin name i/o description primary/ secondary/ tertiary logic rc oscillation type a/d converter in0 i channel 0 oscillation input pin. this pin is used as the secondary function of the p30 pin. secondary ? cs0 o channel 0 reference capacitor connecti on pin. this pin is used as the secondary function of the p31 pin. secondary ? rs0 o this pin is used as the secondary f unction of the p32 pin which is the reference resistor connection pin of channel 0. secondary ? rt0 o resistor sensor connection pin of channel 0 for measurement. this pin is used as the secondary function of the p33 pin. secondary ? r t0 o resistor/capacitor sensor connection pin of channel 0 for measurement. this pin is used as the secondary function of the p34 pin. secondary ? rcm o rc oscillation monitor pin. this pin is used as the secondary function of the p35 pin. secondary ? in1 i oscillation input pin of channel 1. this pin is used as the secondary function of the p44 pin. secondary ? cs1 o reference capacitor connection pin of channel 1. this pin is used as the secondary function of the p45 pin. secondary ? rs1 o reference resistor connection pin of channel 1. this pin is used as the secondary function of the p46 pin. secondary ? rt1 o resistor sensor connection pin for meas urement of channel 1. this pin is used as the secondary function of the p47 pin. secondary ? successive approximation type a/d converter av ss ? negative power supply pin for successive approximation type a/d converter. ? ? av dd ? positive power supply pin for successive approximation type a/d converter. ? ? v ref ? reference power supply pin for successive approximation type a/d converter. ? ? ain0 i channel 0 analog input for successive approximation type a/d converter. ? ? ain1 i channel 1 analog input for successive approximation type a/d converter. ? ? lcd drive signal com0-15 o common output pins. ? ? com16-23 o common output pins. these pins are for the ml610q432, but are not provided in the ml610q431. ? ? seg0-63 o segment output pin. ? ? lcd driver power supply v l1 ? ? ? v l2 ? ? ? v l3 ? ? ? v l4 ? power supply pins for lcd bias (internally generated). capacitors ca, cb, cc, and cd (see measuring circuit 1) are connected between v ss and v l1 , v l2 , v l3 , and v l4 , respectively. ? ? c1 ? ? ? c2 ? ? ? c3 ? ? ? c4 ? power supply pins for lcd bias (internally generated). capacitors c12 and c34 (see measuring circuit 1) are connected between c1 and c2 and between c3 and c4, respectively. ? ? for testing test i/o input/output pin for testing. a pull-down resistor is internally connected. ? ? power supply v ss ? negative power supply pin. ? ? v dd ? positive power supply pin. ? ? v ddl ? positive power supply pin (internally generated) for internal logic. capacitors cl0 and cl1 (see measuring circuit 1) are connected between this pin and v ss . ? ? v ddx ? plus-side power supply pin (internally generated) for low-speed oscillation. capacitor cx (see measuring circuit 1) is connected between this pin and v ss . ? ? v pp ? power supply pin for programming flash rom. a pull-up resistor is internally connected. ? ?
fedl610q431-01 oki semiconductor ml610q431/ml610q432 19/35 termination of unused pins table 3 shows methods of terminating the unused pins. table 3 termination of unused pins pin recommended pin termination v pp open av dd v ss av ss v ss v ref v ss ain0, ain1 open v l1 , v l2 , v l3 , v l4 open c1, c2, c3, c4 open reset_n open test open nmi open p00 to p03 v dd or v ss p10 to p11 v dd p20 to p22 open p30 to p35 open p40 to p47 open pa0 to pa7 open com0 to 23 open seg0 to 63 open note: it is recommended to set the unused input ports and input/output ports to the inputs with pull-down resistors/pull-up resistors or the output mode since the supply current may become excessively large if the pins are left open in the high impedance input setting.
fedl610q431-01 oki semiconductor ml610q431/ml610q432 20/35 electrical characteristics absolute maximum ratings (v ss = av ss = 0v) parameter symbol condition rating unit power supply voltage 1 v dd ta = 25 c ? 0.3 to +4.6 v power supply voltage 2 av dd ta = 25 c ? 0.3 to +4.6 v power supply voltage 3 v pp ta = 25 c ? 0.3 to +9.5 v power supply voltage 4 v ddl ta = 25 c ? 0.3 to +3.6 v power supply voltage 5 v ddx ta = 25 c ? 0.3 to +3.6 v power supply voltage 6 v l1 ta = 25 c ? 0.3 to +1.75 v power supply voltage 7 v l2 ta = 25 c ? 0.3 to +3.5 v power supply voltage 8 v l3 ta = 25 c ? 0.3 to +5.25 v power supply voltage 9 v l4 ta = 25 c ? 0.3 to +7.0 v input voltage v in ta = 25 c ? 0.3 to v dd +0.3 v output voltage v out ta = 25 c ? 0.3 to v dd +0.3 v output current 1 i out1 port3?a, ta = 25 c ? 12 to +11 ma output current 2 i out2 port2, ta = 25 c ? 12 to +20 ma power dissipation pd ta = 25 c 122 mw storage temperature t stg ? ? 55 to +150 c recommended operating conditions (v ss = av ss = 0v) parameter symbol condition range unit operating temperature t op ? ? 20 to +70 c v dd ? 1.1 to 3.6 operating voltage av dd ? 2.2 to 3.6 v v dd = 1.1 to 3.6v 30k to 36k v dd = 1.3 to 3.6v 30k to 650k operating frequency (cpu) f op v dd = 1.8 to 3.6v 30k to 4.2m hz low-speed crystal oscillation frequency f xtl ? 32.768k hz c dl ? 0 to 12 low-speed crystal oscillation external capacitor c gl ? 0 to 12 pf high-speed crystal/ceramic oscillation frequency f xth ? 4.0m / 4.096m hz c dh ? 24 high-speed crystal oscillation external capacitor c gh ? 24 pf c l0 ? 1.0 30% capacitor externally connected to v ddl pin c l1 ? 0.1 30% f capacitor externally connected to v ddx pin c x ? 0.1 30% f capacitors externally connected to v l1, 2, 3, 4 pins c a, b, c, d ? 1.0 30% f capacitors externally connected across c1 and c2 pins and across c3 and c4 pins c 12, c 34 ? 1.0 30% f
fedl610q431-01 oki semiconductor ml610q431/ml610q432 21/35 operating conditions of flash rom (v ss = av ss = 0v) parameter symbol condition range unit operating temperature t op at write/erase 0 to +40 c v dd at write/erase *1 2.75 to 3.6 v ddl at write/erase *1 2.5 to 2.75 operating voltage v pp at write/erase *1 7.7 to 8.3 v write cycles c ep ? 80 cycles data retention y dr ? 10 years *1 : when writing to and erasing on the flash memory, the vo ltage in the specified range needs to be supplied to the v ddl pin. the v pp pin has an internal pull-down resistor. dc characteristics (1/5) (v dd = 1.1 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (1/5) rating parameter symbol condition min. typ. max. unit measuring circuit ta = 25 c typ. ? 10% 500 typ. + 10% khz 500khz rc oscillation frequency f rc v dd = 1.3 to 3.6v ta = ? 20 to +70 c typ. ? 25% 500 typ. + 25% khz pll oscillation frequency* 4 f pll lsclk = 32.768khz v dd = 1.8 to 3.6v typ. -2.5% 8.192 typ. +2.5% mhz low-speed crystal oscillation start time* 2 t xtl ? ? 0.3 2 s 500khz rc oscillation start time t rc ? ? 50 500 s high-speed crystal oscillation start time* 3 t xth v dd = 1.8 to 3.6v D 2 20 pll oscillation start time t pll v dd = 1.8 to 3.6v D 1 10 low-speed oscillation stop detect time *1 t stop ? 0.2 3 20 ms reset pulse width p rst ? 200 ? ? reset noise elimination pulse width p nrst ? ? ? 0.3 s power-on reset activation power rise time t por ? ? ? 10 ms 1 * 1 : when low-speed crystal oscillation stops for a duration more t han the low-speed oscillation stop detect time, the system is reset to shift to system reset mode. * 2 : use 32.768khz crystal oscillator c-001r (epson toyocom) with capacitance c gl /c dl 0pf. * 3 : use 4.096mhz crystal oscillator hc49sfwb (kyocera). * 4 : 1024 clock average. reset reset_n reset_n pin reset vdd 0.9xv dd 0.1xv dd t por power on reset p rst vil1 vil1
fedl610q431-01 oki semiconductor ml610q431/ml610q432 22/35 dc characteristics (2/5) (v dd = 1.1 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (2/5) rating parameter symbol condition min. typ. max. unit measuring circuit cn4?0 = 00h 0.89 0.94 0.99 cn4?0 = 01h 0.91 0.96 1.01 cn4?0 = 02h 0.93 0.98 1.03 cn4?0 = 03h 0.95 1.00 1.05 cn4?0 = 04h 0.97 1.02 1.07 cn4?0 = 05h 0.99 1.04 1.09 cn4?0 = 06h 1.01 1.06 1.11 cn4?0 = 07h 1.03 1.08 1.13 cn4?0 = 08h 1.05 1.10 1.15 cn4?0 = 09h 1.07 1.12 1.17 cn4?0 = 0ah 1.09 1.14 1.19 cn4?0 = 0bh 1.11 1.16 1.21 cn4?0 = 0ch 1.13 1.18 1.23 cn4?0 = 0dh 1.15 1.20 1.25 cn4?0 = 0eh 1.17 1.22 1.27 cn4?0 = 0fh 1.19 1.24 1.29 cn4?0 = 10h 1.21 1.26 1.31 cn4?0 = 11h 1.23 1.28 1.33 cn4?0 = 12h 1.25 1.30 1.35 cn4?0 = 13h 1.27 1.32 1.37 cn4?0 = 14h *1 1.29 1.34 1.39 cn4?0 = 15h *1 1.31 1.36 1.41 cn4?0 = 16h *1 1.33 1.38 1.43 cn4?0 = 17h *1 1.35 1.40 1.45 cn4?0 = 18h *1 1.37 1.42 1.47 cn4?0 = 19h *1 1.39 1.44 1.49 cn4?0 = 1ah *1 1.41 1.46 1.51 cn4?0 = 1bh *1 1.43 1.48 1.53 cn4?0 = 1ch *1 1.45 1.50 1.55 cn4?0 = 1dh *1 1.47 1.52 1.57 cn4?0 = 1eh *1 1.49 1.54 1.59 v l1 voltage v l1 v dd = 3.0v, tj = 25 c cn4?0 = 1fh *1 1.51 1.56 1.61 v v l1 temperature deviation v l1 v dd = 3.0v ? ? 1.5 ? mv/ c v l1 voltage dependency v l1 v dd = 1.3 to 3.6v ? 5 20 mv/v v l2 voltage v l2 v dd = 3.0v, tj = 25 c 300k load (v l4 ? v ss ) typ. ? 10% v l1 2 typ. +4% 1/3 bias v l1 2 v l3 voltage v l3 1/4 bias typ. ? 10% v l1 3 typ. +4% 1/3 bias v l1 3 v l4 voltage v l4 v dd = 3.0v, tj = 25 c 300k load (v l4 ? v ss ) 1/4 bias typ. ? 10% v l1 4 typ. +5% v lcd bias voltage generation time t bias ? ? ? 600 ms 1 * 1 : when using 1/4 bias, the v l1 voltage is set to typ. 1.32 v (same voltage as in cn4?0 = 13h).
fedl610q431-01 oki semiconductor ml610q431/ml610q432 23/35 dc characteristics (3/5) (v dd = 1.1 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (3/5) rating parameter symbol condition min. typ. max. unit measuring circuit ld2?0 = 0h 1.35 ld2?0 = 1h 1.4 ld2?0 = 2h 1.45 ld2?0 = 3h 1.5 ld2?0 = 4h 1.6 ld2?0 = 5h 1.7 ld2?0 = 6h 1.8 ld2?0 = 7h 1.9 ld2?0 = 8h 2.0 ld2?0 = 9h 2.1 ld2?0 = 0ah 2.2 ld2?0 = 0bh 2.3 ld2?0 = 0ch 2.4 ld2?0 = 0dh 2.5 ld2?0 = 0eh 2.7 bld threshold voltage v bld v dd = 1.35 to 3.6v ld2?0 = 0fh typ. ? 2% 2.9 typ. +2% v bld threshold voltage temperature deviation v bld v dd = 1.35 to 3.6v ? 0 ? %/ c ta = 25 c ? 0.15 0.50 supply current 1 idd1 cpu: in stop state. low-speed/high-speed oscillation: stopped. ta = -20 to +70 c ? ? 2.50 a ta = 25 c ? 0.5 1.3 supply current 2 idd2 cpu: in halt state (ltbc, rtc: operating * 3 * 5 ). high-speed oscillation: stopped. lcd/bias circuits: stopped. ta = -20 to +70 c ? ? 3.5 a ta = 25 c ? 5 7 supply current 3 idd3 cpu: in 32.768khz operating state.* 1 * 3 high-speed oscillation: stopped. lcd/bias circuits: operating.* 2 ta = -20 to +70 c ? ? 12 a ta = 25 c ? 70 85 supply current 4 idd4 cpu: in 500khz cr operating state. lcd/bias circuits: operating.* 2 ta = -20 to +70 c ? ? 100 a ta = 25 c ? 0.8 1.0 supply current 5 idd5 cpu: in 4.096mhz operating state.* 2 * 3 pll: in oscillating state. lcd/bias circuits: operating. * 2 v dd = 1.8 to 3.6v ta = -20 to +70 c ? ? 1.2 ma ta = 25 c ? 1.5 1.6 supply current 6 idd6 cpu: in 4.096mhz operating state.* 2 pll: in oscillating state. * 3 * 4 a/d: in operating state. lcd/bias circuits: operating. * 2 v dd = av dd = 3.0v ta = -20 to +70 c ? ? 2.5 ma 1 * 1 : cpu operating rate is 100% (no halt state). * 2 : all segs: off waveform, no lcd panel load, 1/3 bias, 1/3 dut y, frame frequency: approx. 64 hz, bias voltage multiplying clock: 1/128 lsclk (256hz) * 3 : use 32.768khz crystal oscillator c-001r (epson toyocom) with capacitance c gl /c dl 0pf. * 4 : use 4.096mhz crystal oscillator hc49sfwb (kyocera). * 5 : significant bits of blkcon0~blkcon4 registers are all ?1?.
fedl610q431-01 oki semiconductor ml610q431/ml610q432 24/35 dc characteristics (4/5) (v dd = 1.1 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (4/5) rating parameter symbol condition min. typ. max. unit measuring circuit ioh1 = ? 0.5ma, v dd = 1.8 to 3.6v v dd ? 0.5 ? ? ioh1 = -0.1ma, v dd = 1.3 to 3.6v v dd ? 0.3 ? ? voh1 ioh1 = -0.03ma, v dd = 1.1 to 3.6v v dd ? 0.3 iol1 = +0.5ma, v dd = 1.8 to 3.6v ? ? 0.5 iol1 = +0.1ma, v dd = 1.3 to 3.6v ? ? 0.5 output voltage 1 (p20?p22/2 nd function is selected) (p30?p35) (p40?p47) (pa0?pa7) *1 vol1 iol1 = +0.03ma, v dd = 1.1 to 3.6v ? ? 0.3 ioh1 = ? 0.5ma, v dd = 1.8 to 3.6v v dd ? 0.5 ? ? ioh1 = -0.1ma, v dd = 1.3 to 3.6v v dd ? 0.3 ? ? voh2 ioh1 = -0.03ma, v dd = 1.1 to 3.6v v dd ? 0.3 ? ? output voltage 2 (p20?p22/2 nd function is not selected) vol2 iol2 = +5ma, v dd = 1.8 to 3.6v ? ? 0.5 output voltage 3 (p40?p41) vol3 iol3 = +3ma, v dd = 2.0 to 3.6v (when i 2 c mode is selected) ? ? 0.4 voh4 ioh4 = ? 0.2ma, vl1=1.2v v l4 ? 0.2 ? ? vomh4 iomh4 = +0.2ma, vl1=1.2v ? ? v l3 +0.2 vomh4s iomh4s = ? 0.2ma, vl1=1.2v v l3 ? 0.2 ? ? vom4 iom4 = +0.2ma, vl1=1.2v ? ? v l2 +0.2 vom4s iom4s = ? 0.2ma, vl1=1.2v v l2 ? 0.2 ? ? voml4 ioml4 = +0.2ma, vl1=1.2v ? ? v l1 +0.2 voml4s ioml4s = ? 0.2ma, vl1=1.2v v l1 ? 0.2 ? ? output voltage 4 (com0?15) (com16?23) *2 (seg0?63) vol4 iol4 = +0.2ma, vl1=1.2v ? ? 0.2 v 2 iooh voh = v dd (in high-impedance state) ? ? 1 output leakage (p20?p22) (p30?p35) (p40?p47) (pa0?pa7) *1 iool vol = v ss (in high-impedance state) ? 1 ? ? a 3 iih1 vih1 = v dd 0 ? 1 v dd = 1.8 to 3.6v ? 600 ? 300 ? 20 v dd = 1.3 to 3.6v ? 600 ? 300 -10 input current 1 (reset_n) iil1 vil1 = v ss v dd = 1.1 to 3.6v ? 600 ? 300 300 600 v dd = 1.3 to 3.6v 10 300 600 iih1 vih1 = v dd v dd = 1.1 to 3.6v 2 300 600 input current 1 (test) iil1 vil1 = v ss -1 ? ? v dd = 1.8 to 3.6v 2 30 200 v dd = 1.3 to 3.6v 0.2 30 200 iih2 vih2 = v dd (when pulled-down) v dd = 1.1 to 3.6v 0.01 30 200 v dd = 1.8 to 3.6v ? 200 ? 30 ? 2 v dd = 1.3 to 3.6v ? 200 ? 30 -0.2 iil2 vil2 = v ss (when pulled-up) v dd = 1.1 to 3.6v ? 200 ? 30 -0.01 iih2z vih2 = v dd (in high-impedance state) ? ? 1 input current 2 (nmi) (p00?p03) (p10?p11) (p30?p35) (p40?p47) (pa0?pa7) *1 iil2z vil2 = v ss (in high-impedance state) ? 1 ? ? a 4 * 1 : ml610q431 only * 2 : ml610q432 only
fedl610q431-01 oki semiconductor ml610q431/ml610q432 25/35 dc characteristics (5/5) ) (v dd = 1.1 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) (5/5) rating parameter symbol condition min. typ. max. unit measuring circuit v dd = 1.3 to 3.6v 0.7 v dd ? v dd vih1 v dd = 1.1 to 3.6v 0.7 v dd ? v dd v dd = 1.3 to 3.6v 0 ? 0.3 v dd input voltage 1 (reset_n) (test) (nmi) (p00?p03) (p10?p11) (p31?p35) (p40?p43) (p45?p47) (pa0?pa7) *1 vil1 v dd = 1.1 to 3.6v 0 ? 0.2 v dd v dd = 2.0 to 3.6v 0.05 v dd 0.18 v dd 0.4 v dd hysteresis width (reset_n) (test_n) (nmi) (p00?p03) (p10?p11) (p31?p35) (p40?p43) (p45?p47) (pa0?pa7) *1 vt v dd = 1.1 to 3.6v 0.02 v dd 0.18 v dd 0.4 v dd vih2 ? 0.7 v dd ? v dd input voltage 2 (p30, p44) vil2 ? 0 ? 0.3 v dd v 5 input pin capacitance (nmi) (p00?p03) (p10?p11) (p30?p35) (p40?p47) (pa0?pa7) *1 cin f = 10khz v rms = 50mv ta = 25 c ? ? 5 pf ? * 1 : ml610q431 only hysteresis width
fedl610q431-01 oki semiconductor ml610q431/ml610q432 26/35 measuring circuits measuring circuit 1 measuring circuit 2 xt0 xt1 p10/osc0 p11/osc1 32.768khz crystal 4.096mhz crystal c gh c dh a v dd av dd v ref v ddl v ddx c l1 c l0 c x v l1 c a v l2 c b v l3 c c v l4 c d v ss av ss c4 c3 c2 c1 c 12 c 34 c v : 1 f c l1 : 0.1 f c x : 0.1 f c a ,c b ,c c ,c d : 1 f c 12 ,c 34 : 1 f c gh : 24pf c dh : 24pf 32.768khz crystal: c-001r (epson toyocom) 4.096mhz crystal: hc49sfwb (kyocera) c v input pins v v dd av dd v ref v ddl v ddx v l1 v l2 v l3 v l4 v ss av ss vih vil output pins (*1) input logic circuit to determi ne the specified measuring conditions. (*2) measured at the specified output pins. (*2) (*1)
fedl610q431-01 oki semiconductor ml610q431/ml610q432 27/35 measuring circuit 3 measuring circuit 4 measuring circuit 5 input pins a v dd av dd v ref v ddl v ddx v l1 v l2 v l3 v l4 v ss av ss output pins *3: measured at the specified output pins. (*3) input pins v dd av dd v ref v ddl v ddx v l1 v l2 v l3 v l4 v ss av ss vih vil output pins *1: input logic circuit to determine the specified measuring conditions. (*1) waveform monitoring input pins a v dd av dd v ref v ddl v ddx v l1 v l2 v l3 v l4 v ss av ss vih vil output pins *1: input logic circuit to determine the specified measuring conditions. *2: measured at the specified output pins. (*2) (*1)
fedl610q431-01 oki semiconductor ml610q431/ml610q432 28/35 ac characteristics (external interrupt) (v dd = 1.1 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit external interrupt disable period t nul interrupt: enabled (mie = 1), cpu: nop operation system clock: 32.768khz 76.8 ? 106.8 s ac characteristics (uart) (v dd = 1.3 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit transmit baud rate t tbrt ? ? brt* 1 ? s receive baud rate t rbrt ? brt* 1 ? 3% brt* 1 brt* 1 +3% s *1: baud rate period (including the error of the clock frequency selected) set with the uart0 baud rate register (ua0brtl,h) and the uart0 mode register 0 (ua0mod0). t nul p00?p03 (rising-edge interrupt) p00?p03 (falling-edge interrupt) nmi, p00?p03 (both-edge interrupt) t nul t nul t rbrt txd0* rxd0* *: indicates the secondary function of the port. t tbrt
fedl610q431-01 oki semiconductor ml610q431/ml610q432 29/35 ac characteristics (synchronous serial port) (v dd = 1.3 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit when rc oscillation is active* 2 (v dd = 1.3 to 3.6v) 10 ? ? s sclk input cycle (slave mode) t scyc when high-speed oscillation is active* 3 (v dd = 1.8 to 3.6v) 1 ? ? s sclk output cycle (master mode) t scyc ? ? sclk* 1 ? s when rc oscillation is active* 2 (v dd = 1.3 to 3.6v) 4 ? ? s sclk input pulse width (slave mode) t sw when high-speed oscillation is active* 3 (v dd = 1.8 to 3.6v) 0.4 ? ? s sclk output pulse width (master mode) t sw ? sclk* 1 0.4 sclk* 1 0.5 sclk* 1 0.6 s when rc oscillation is active* 2 (v dd = 1.3 to 3.6v) ? ? 500 sout output delay time (slave mode) t sd when high-speed oscillation is active* 3 (v dd = 1.8 to 3.6v) ? ? 240 ns when rc oscillation is active* 2 (v dd = 1.3 to 3.6v) ? ? 500 sout output delay time (master mode) t sd when high-speed oscillation is active* 3 (v dd = 1.8 to 3.6v) ? ? 240 ns sin input setup time (slave mode) t ss ? 80 ? ? ns when rc oscillation is active* 2 (v dd = 1.3 to 3.6v) 500 ? ? sin input setup time (master mode) t ss when high-speed oscillation is active* 3 (v dd = 1.8 to 3.6v) 240 ? ? ns when rc oscillation is active* 2 (v dd = 1.3 to 3.6v) 300 ? ? sin input hold time t sh when high-speed oscillation is active* 3 (v dd = 1.8 to 3.6v) 80 ? ? ns * 1 : clock period selected with s0ck3?0 of t he serial port 0 mode register (sio0mod1) * 2 : when rc oscillation is selected with oscm1?0 of the frequency contro l register (fcon0) * 3 : when crystal/ceramic oscillation, built-in pll oscillation, or ex ternal clock input is selected with oscm1?0 of the frequency control register (fcon0) t sd sclk0* sin0* sout0* *: indicates the secondar y function of the p ort. sd t ss t sh t sw t sw t scyc
fedl610q431-01 oki semiconductor ml610q431/ml610q432 30/35 ac characteristics (i 2 c bus interface: standard mode 100khz) (v dd = 1.8 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit scl clock frequency f scl ? 0 ? 100 khz scl hold time (start/restart condition) t hd:sta ? 4.0 ? ? s scl ?l? level time t low ? 4.7 ? ? s scl ?h? level time t high ? 4.0 ? ? s scl setup time (restart condition) t su:sta ? 4.7 ? ? s sda hold time t hd:dat ? 0 ? 3.45 s sda setup time t su:dat ? 0.25 ? ? s sda setup time (stop condition) t su:sto ? 4.0 ? ? s bus-free time t buf ? 4.7 ? ? s ac characteristics (i 2 c bus interface: fast mode 400khz) (v dd = 1.8 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit scl clock frequency f scl ? 0 ? 400 khz scl hold time (start/restart condition) t hd:sta ? 0.6 ? ? s scl ?l? level time t low ? 1.3 ? ? s scl ?h? level time t high ? 0.6 ? ? s scl setup time (restart condition) t su:sta ? 0.6 ? ? s sda hold time t hd:dat ? 0 ? 0.9 s sda setup time t su:dat ? 0.1 ? ? s sda setup time (stop condition) t su:sto ? 0.6 ? ? s bus-free time t buf ? 1.3 ? ? s p41/scl p40/sda start condition restart condition stop condition t buf t hd:sta t low t high t su:sta t hd:sta t su:dat t hd:dat t su:sto
fedl610q431-01 oki semiconductor ml610q431/ml610q432 31/35 ac characteristics (rc oscillation a/d converter) (v dd = 1.3 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit resistors for oscillation rs0, rs1, rt0, rt0-1,rt1 cs0, ct0, cs1 740pf 1 ? ? k f osc1 resistor for oscillation = 1k 209.4 330.6 435.1 khz f osc2 resistor for oscillation = 10k 41.29 55.27 64.16 khz oscillation frequency vdd = 1.5v f osc3 resistor for oscillation = 100k 4.71 5.97 7.06 khz kf1 rt0, rt0-1, rt1 = 1khz 5.567 5.982 6.225 ? kf2 rt0, rt0-1, rt 1 = 10khz 0.99 1 1.01 ? rs to rt oscillation frequency ratio *1 vdd = 1.5v kf3 rt0, rt0-1, rt1 = 100khz 0.104 0.108 0.118 ? f osc1 resistor for oscillation = 1k 407.3 486.7 594.6 khz 49.76 59.28 72.76 khz 5.04 5.993 7.04 khz ? kf2 rt0, rt0-1, rt 1 = 10khz 0.99 1 1.01 ? rs to rt oscillation frequency ratio *1 vdd = 3.0v kf3 rt0, rt0-1, rt1 = 100khz 0.100 0.108 0.115 ? *1: kfx is the ratio of the oscillation frequency by the sensor resistor to the oscillation frequency by the reference resistor on the same conditions. f oscx (rt0 ? cs0 oscillation) f oscx (rt0-1 ? cs0 oscillation) f oscx (rt1 ? cs1 oscillation) kfx = f oscx (rs0 ? cs0 oscillation) , f oscx (rs0 ? cs0 oscillation) , f oscx (rs1 ? cs1 oscillation) (x = 1, 2, 3) note: - please have the shortest layout for the common node (wiring patterns which are connec ted to the external capacitors, resistor s and in0/in1 pin), including cvr0/cvr1. especially, do not hav e long wire between in0/in1 and rs0/rs1. the coupling capacitance on the wires may occur incorrect a/d conversion. al so, please do not have signals which may be a source of noise around the node. - when rt0/rt1 (thermistor and et c.) requires long wiring due to the restricted placement, please have vss(gnd) trace next to the signal. - please make wiring to components (capacitor, resisteor and et c.) necessory for objective measurement. wiring to reserved components may affect to the a/d conversion oper ation by noise the components itself may have. v dd av dd v ref v ddl v ddx c l1 c l0 c x v ss av ss c v rt0, rt0-1, rt1: 1k cs0, ct0, cs1: 560pf cvr0, cvr1: 820pf rcm frequency measurement (f oscx ) input pins vih vil *1: input logic circuit to determine the specified measuring conditions. (*1) cs0 rt0 in1 cs1 rs1 rt1 cs0 rs0 rs0 rct0 rt0-1 ct0 rt0 cs1 rs1 rt1 in0 cvr0 cvr1
fedl610q431-01 oki semiconductor ml610q431/ml610q432 32/35 electrical characteristics of successive approximation type a/d converter (v dd = 1.8 to 3.6v, av dd = 2.2 to 3.6v, v ss = av ss = 0v, ta = ? 20 to +70 c, unless otherwise specified) rating parameter symbol condition min. typ. max. unit resolution n ? ? ? 12 bit 2.7v v ref 3.6v ? 4 ? +4 integral non-linearity error idl 2.2v v ref 2.7v ? 6 ? +6 2.7v v ref 3.6v ? 3 ? +3 differential non-linearity error dnl 2.2v v ref 2.7v ? 5 ? +5 zero-scale error v off ? ? 6 ? +6 full-scale error fse ? ? 6 ? +6 lsb reference voltage v ref ? 2.2 ? av dd v sack = 0 (hsclk = 375khz to 625khz) ? 25 ? conversion time t conv sack = 1 (hsclk = 1.5mhz to 4.2mhz) ? 112 ? /ch : period of high-speed clock (hsclk) a v dd a v dd v ref v ddl v ddx v ss av ss analog input 1 f ? ri f 0.1 f a in0, a in1 1 f reference voltage
fedl610q431-01 oki semiconductor ml610q431/ml610q432 33/35 package dimensions (unit: mm) notes for mounting the su rface mount type package the surface mount type packages are very su sceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact our responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
fedl610q431-01 oki semiconductor ml610q431/ml610q432 34/35 revision history page document no. date previous edition current edition description fedl610q431-01 jun. 29,2010 ? ? formally edition 1.0
fedl610q431-01 oki semiconductor ml610q431/ml610q432 35/35 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits de scribed herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circu it, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki semiconductor assumes no responsibility or liabilit y whatsoever for any failure or unusual or unexpected operation resulting from misuse, ne glect, improper installation, repair, alterati on or accident, improper handling, or unusual physical or electrical stress incl uding, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s indust rial and intellectual property right, etc. is granted by us i n connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g. , office automation, communication equipment, measurement equipment, consumer electro nics, etc.). these products are not, unless specifically authorized by oki se miconductor authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in an y system or application where the failure of such system o r application may result in the loss or damage of property, or death or injury to humans. such applications include, bu t are not limited to, traffic an d automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2010 oki semiconductor co., ltd.

▲Up To Search▲

Price & Availability of ML610Q432-NNNTCZ03A

	To Download ML610Q432-NNNTCZ03A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .